I have a two port PCI parallel card with a Timedia ASIC and PCI id
1409:7268 installed on a board from ASUS with a SiS530 chipset using a
K6-3 400.
In addition to the FIFO "feature" I've previously discussed with Tim
I've found a new problem with spurious interrupt generation on IRQ7.
The parport_pc probe code for fifo size and thresholds determination
should generate a single interrupt for each of these actions (on the
INTA signal). This board (and motherboard combo) generates a interrupt
on the correct IRQ for the first two and then generates IRQ7 on the
third action.
I forced the interrupt for the slot from IRQ5 to IRQ12 with equivalent
results. When forced to IRQ7 everything did report solely on IRQ7.
I'm somewhat at a loss to explain this behavior. My first guess would be
a board flaw. But I fail to understand how the board could be generating
an interrupt on IRQ7. If it was a INTA/INTB issue I'd expect an IRQ
other than IRQ7. The boards INTB should show up as INTA on an adjacent
board right? So with the spurious interrupts showing up only on IRQ7 I
have to wonder if it's not a motherboard chipset quirk of some type? All
that PCI / north / south bridge setup code looks an awful lot like black
art to me. To proceed any further I need help!
Suggestions and comments very welcome.
A log (I modified the probe code to only do the fifo sizing) with my
added instrumentation follows:
Nov 30 09:37:47 (none) kernel: PCI: Found IRQ 5 for device 00:0c.0
Nov 30 09:37:47 (none) kernel: parport: irq 8 in use
Nov 30 09:37:47 (none) kernel: parport: irq 9 in use
Nov 30 09:37:47 (none) kernel: PCI parallel port detected: 1409:7268,
I/O at 0x9800(0x9400)
Nov 30 09:37:47 (none) kernel: <NULL>: PC-style at 0x9800<6>FIRST CALL
Nov 30 09:37:47 (none) kernel: 0x9800: Enter parport_ECP_supported
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 5. <----------
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 1
Nov 30 09:37:47 (none) kernel:
Nov 30 09:37:47 (none) kernel: 0x9800: FIFO is 16 bytes
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 2
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 5. <---------
Nov 30 09:37:47 (none) kernel: 0x9800: writeIntrThreshold is 8
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 3
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 7. <---------
Nov 30 09:37:47 (none) kernel: 0x9800: readIntrThreshold is 8
Nov 30 09:37:47 (none) kernel: Second CALL
Nov 30 09:37:47 (none) kernel: 0x9800: Enter parport_ECP_supported
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 5. <----------
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 1
Nov 30 09:37:47 (none) kernel:
Nov 30 09:37:47 (none) kernel: 0x9800: FIFO is 16 bytes
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 2
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 5. <-----------
Nov 30 09:37:47 (none) kernel: 0x9800: writeIntrThreshold is 8
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 3
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 7. <----------
Nov 30 09:37:47 (none) kernel: 0x9800: readIntrThreshold is 8
Nov 30 09:37:47 (none) kernel: Third CALL
Nov 30 09:37:47 (none) kernel: 0x9800: Enter parport_ECP_supported
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 5. <----------
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 1
Nov 30 09:37:47 (none) kernel:
Nov 30 09:37:47 (none) kernel: 0x9800: FIFO is 16 bytes
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 2
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 5. <--------
Nov 30 09:37:47 (none) kernel: 0x9800: writeIntrThreshold is 8
Nov 30 09:37:47 (none) kernel: 0x9800: enable service intr. 3
Nov 30 09:37:47 (none) kernel: parport_pcx_interrupt for 7. <---------
Nov 30 09:37:47 (none) kernel: 0x9800: readIntrThreshold is 8
Regards,
Tom
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