David Campbell (email@example.com)
Fri, 30 Oct 1998 06:48:35 +0800
Date sent: Thu, 29 Oct 1998 21:33:43 +0100
From: Uwe Klein <firstname.lastname@example.org>
Organization: KLEIN Messgeraete
To: Daniel Maddy <email@example.com>
Copies to: firstname.lastname@example.org
Subject: [PARPORT] Re: ECP and SuperIO chips
> you shure aboute the PSPS? if not forw. to the list pls
> well i first did some test with the "hardware enhanced" mode 010
> and did PIO into the fifo with a switch statement and HighWater and
> LowWater marks this gave me about 5-600kB transfer rate
Most parallel ports are connected to the ISA bus which is limited to around
0.8-1.2 million IO/sec depending on the exact mainboard configuration.
Therefore the upper limit will be around 1MB/sec.
> but i have more need of fast input than output and I dislike keeping the
> cpu busy with what is essentially dumb work.
Was the PIO method based on my posting I sent last week?
Basically wait (using usleep()) till the FIFO is full/empty and then transfer
16 bytes blindly.
> Next step was to implement DMA and last step was ECP and reverse transfers.
> well everything works, but no reverse transfer neither Pio nor DMA; bah :((
> Did you get any rev transfers in mode 011/ecp acomplished?
You need to set bit 5 (0x20) of the parallel port CTR (base+0x2), this is
probably the culprit.
Current project list:
a) Maintain Linux ZIP drivers (documentation needed)
b) Create Linux chipset specific parport drivers
Any assistance to clearing this list most welcome
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This archive was generated by hypermail 2.0b3 on Wed 30 Dec 1998 - 10:18:42 EST