those are links to a number of i/o chips that the pc uses to interface to the paralell port (my soyo 6ba motherboard has an ite 8671f i/o chip). there's a detailed explanation of all the epp registers and timing on the PDFs (yes, i know, those are propietary stuff and not standards).
btw, does anyone knows where to get a copy of the IEEE1284 spec?
At 11:24 AM 2/23/00 -0400, you wrote:
>I am very new to parallel port programming and am trying to program the
>port to interface a small digital b/w camera(384x288 pixels). I started
>by programming the Standard Parallel Port, however, i realize that my
>data lines must be bidirectional so I have been reading about using the
>EPP mode. My camera has 8 data lines and four separate address lines so
>I've already built an external latch for this problem. I don't want to
>try anything before knowing exactly hoe the handshaking works... I wrote a
>c program to perform both read and write cycles, but then I read that the
>hardware does all the work and to initate the EPP cycle the software needs
>only to write one I/O operation to the register in question. Can anyone
>clarify this for me, or tell me where I might find more information?
>Also, to actually have the port in EPP mode is it enough just to define
>the base+3 - base+7 memory allocations?
>I apologize if my questions are relatively simplistic, but it is hard to
>find the appropriate information when surrounded by so much of it.
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This archive was generated by hypermail 2b29 : Mon Feb 28 2000 - 14:48:22 EST