Re: [PARPORT] Patch[2.4.0pre3t2]: Parport TSC Timings

From: Gunther Mayer (
Date: Sun Jul 02 2000 - 17:08:52 EDT

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    Tim Waugh wrote:

    > On Sun, Jul 02, 2000 at 03:42:37PM +0200, Gunther Mayer wrote:
    > > this patch shows some register access times if TSC is available.
    > Nice.
    > > My Mainboard P3B-F seems to have 4.33MHz ISA speed (750ns *8/4.33 ~ 1350),
    > > anybody knows why this isn't 8 MHz ?
    > Wait states (is that the right name)? The CPU has to wait for the ISA
    > bus first.

    Yes, but this is already accounted for:
    An ISA I/O read cycle takes 6 ISA bus cycles (according Axelsons "Parallel Port complete")
    - 6 cycles at 4.33 Mhz take 1385ns (230ns cycle time)
    - 6 cycles at 8 MHz take 750ns (125ns cycle time)

    I timed access to an unused port and this took the same time.
    So I rather assume my ISA bus is running at about 4 MHz.
    The BIOS provides further wait states for older cards, I have
    selected the fastest value (I/O recovery time).

    But this contradicts PIIX4 PCI-ISA bridge documentation, where
    the ISA speed is documented as 7.5-8.33 MHz (1/4 PCI speed).


    Regards, Gunther

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