It's been quite a while since I looked at a datasheet for an 8255, so
this info may be worth exactly what your paying for it.
As I recall the 8255 was mappable as you suggest. But that's not the way
it was built onto the board (by IBM in '81). The status and control reg
pins are hardwired as to function(sink or source) so even if you could
get access to reconfigure the ICs pins I don't think you'll get the
results you're looking for. And as I recall the cable just isn't wired
to the 8255 the way your hoping. Also keep in mind that 8255s haven't
been used for a LONG time. Most parports are implemented on superio
chips and I think it's unlikely they're that identical to real 8255s (re
mask setup anyway).
So if you're just looking for something with real simple TTL then keep
to the signal directions as listed for the parport cable. If you need
more then ECP mode would handle about anything you need and there're
device side ICs for this as well (intel, mot, etc).
MERRETT, David wrote:
> I have been looking through information available for a clear indication of
> how to put the 8255 PIO chip into MODE 0, using the typical Linux drivers.
> This mode allows direct control of all 24 bits on a standard 25 pin
> connector. I believe it would only work in SPP mode, as the control byte to
> put the 8255 in Mode 0 must be written to BASE + 3 (EG to put all 24 pins
> of port with base 0x0378, to be outputs, byte 0x80 is written to 0x037B)
> Is this possible using parport, or any previously existing driver?
> the only way I can do it is to write to port driectly but using
> ioperm(0x0378,4,1) as root.
> RF engineer, BAE Systems.
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This archive was generated by hypermail 2b29 : Mon Feb 04 2002 - 01:26:14 EST