[PARPORT] parport / ppdev/ pc superio chipsets

From: Peter Asemann (sipeasem@immd3.informatik.uni-erlangen.de)
Date: Sun Jun 01 2003 - 12:49:38 EDT

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    I'm sorry I'm not running out of questions... the more I think about the
    parport stuff and the more I read Jan Axelson's "parallel port complete", the
    more I get confused, as there seem to be a million possibilities the hardware

    When a PC has a superio chipset providing a parallel port, will the parport
    drivers find it (in case superio support is compiled in or loaded as module),
    and will ppdev be able to use all transfer modes of that port an negotiate
    into them, when a device supporting that mode is connected?
    Superio chips' ECR doesn't appear at base address + 400 in the io address
    space, do they? As most PCs do have superio chips (I suppose), are there any
    real life ECP-capable parport chips which appear at that address, and does
    the kernel "probe" that addess by default?

    There might be a very old compatibility mode device connected to a
    state-of-the-art ieee1284 controller.
    Is there a way to detect whether the controller would support some advanced
    mode even if the device connected doesn't support that mode?
    E.g. to write a program that says "Your controller has ECP hardware support
    but your printer only understands SPP"?

    Is it possible to simply try negotiating to all possible modes using ppdev to
    find out which modes are supported by the actual hardware?

    Where in the parport driver codes are the "finite state machines" which
    perform negotiation with connected devices, daisy chaining etc.?

    Peter Asemann

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